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Phidias presents two session on ICT Summer School
7-12 July, Fiuggi, Italy
Presentation of Phidias On ENTRA Workshop
6-7 May 2015, Malaga, Spain
Two PHIDIAS papers accepted for DATE 2015!
Two papers with the following titles
- “Ultra-Low-Power ECG Front-End Design based on Compressed Sensing”, authored by Hossein Mamaghanian, Pierre Vandergheynst,
- “An Ultra-Low Power Dual-mode ECG Monitor for Healthcare and Wellness”, authored by Daniele Bortolotti, Mauro Mangia, Andrea Bartolini, Riccardo Rovatti, Gianluca Setti and Luca Benini,
have been accepted at Design, Test and Automation in Europe Conference and Exhibition (DATE 2015 , taking place from 9-13 March 2015 in Grenoble, France).
BioCAS 2014: Paper presented
The paper from V. Rajesh Pamula, Marian Verhelst, Chris Van Hoof and Refet Firat Yazicioglu, witht the title “Computationally-Efficient Compressive Sampling for Low-Power Pulseoximeter System” was presented at the IEEE Biomedical Circuits and Systems Conference (BioCAS 2014), from 22-24 October 2014, in Lausanne, Switzerland.
Abstract:
This paper presents a computationally-efficient compressive sampling system for photoplethysmogram (PPG) signals. The approach relies on the exploration of the Discrete Cosine Transform (DCT) as sparsifying basis for reconstruction of randomly sampled signals, along with an overlapped window reconstruction algorithm, which improves reconstruction accuracy of shorter windows, without sacrificing reconstruction accuracy. Simulation results demonstrate a reduction in CPU execution time by a factor of 2.4 without degradation of reconstruction accuracy compared to a traditional longer window reconstruction approach. This facilitates computationally-efficient, low-latency signal reconstruction.
PhD defended!
Hossein Mamaghanian (EPFL) defended his PhD dissertation titled “Compressed sensing: a universal energy-efficient compression scheme for biosignals on wireless body sensor nodes” on 25th August 2014. Congratulations to the new doctor!
ISLPED Conference 2014: Joint PHIDIAS paper presented
The joint paper “Approximate Compressed Sensing: Ultra-Low Power Biosignal Processing via Aggressive Voltage Scaling on a Hybrid Memory Multi-core Processor.” by Daniele Bortolotti, Hossein Mamaghanian, Andrea Bartolini, Maryam Ashouei, Jan Stuijt, David Atienza, Pierre Vandergheynst and Luca Benini has been presented at the International Symposium on Low Power Electronics and Design (ISLPED 2014), in August 2014.
Journal of Microprocessors and Microsystems: Paper
The authors Daniele Bortolotti, Andrea Bartolini, and Luca Benini published a paper titled “An ultra-low power resilient multi-core architecture with static and dynamic tolerance to ambient temperature-induced variability.” in the Journal of Microprocessors and Microsystems, Elsevir (2014).
IET Electronic Letters: Paper to appear
A paper with the title “0.35V time-domain based Instrumentation Amplifier”, of the authors Rachit Mohan, Yan Long, Georges Gielen, Chris Van Hoof and Refet Firat Yazicioglu will appear in the IET Electronics Letters.
Abstract:
A time-domain based amplifier concept is proposed to obtain high voltage gains with low power consumption and at an ultra-low supply voltage of 0.35V. A prototype instrumentation amplifier designed with the proposed technique in 180nm technology, consumes 210nW power and 0.1mm2 of active area.
DATE 2014: PHIDIAS paper and poster presented
On the Design, Automation and Test in Europe Conference (DATE) 2014 a poster and paper of PHIDIAS was presented:
POSTER on PHD forum
“A Process and Environmental Variation Tolerance Scheme for ULP Shared-memory Processor Clusters”, (Authors: Daniele Bortolotti, Andrea Bartolini, and Luca Benini). March 2014
The Poster can be found here (PDF, 1.5M)
CONFERENCE Paper
“Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors”, (Authors: Daniele Bortolotti, Andrea Bartolini, Christian Weis, Davide Rossi and Luca Benini).
DASIP 2014: Conference paper presented
The paper “Rakeness-based Compressed Sensing on Ultra-Low Power Multi-Core Biomedical Processors”, written by Daniele Bortolotti, Mauro Mangia, Andrea Bartolini, Riccardo Rovatti, Gianluca Setti and Luca Benini was presented on the Conference on Design and Architectures for Signal and Image Processing (DASIP 2014).
Keynote speech on PHIDIAS at the FETCH embedded system conference in Canada
Dr. Giovanni Ansaloni of the École Polytechnique Fédérale de Lausanne presented a keynote speech at the FETCH embedded systems conference in Ottawa, Canada in January 2014.
First outcomes of PHIDIAS presented to academic and industry delegates
Luca Benini (UNIBO) has presented the first year’s research outcomes in the Scalable Approaches to High Performance and High Productivity Computing Workshop ScalPerf in September 2013. The audience was composed by a variety of academic and industry delegates (LBNL, IBM Research, UIBK, Jülich Supercomputing Center, VTT Electronics, Xerox, Optware, Google).
PHIDIAS presented in Japan
Tobias Gemmeke (imec-NL) has presented the near-VT synthesizable memory design and modelling during a trip to Japan to a partner in June 2013.
Best Paper Award DATE 2013: PHIDIAS paper wins
The paper with the tilte “SCC thermal model identification via advanced bias-compensated least-squares” written by Roberto Diversi, Andrea Bartolini, Andrea Tilli, Francesco Beneventi and Luca Benini and published in the proceedings of the Design, Automation and Test in Europe (DATE) Conference of March 2013 (Grenoble, France) has won the best paper award of this conference.
Abstract of the paper: Compact thermal models and modeling strategies are today a cornerstone for advanced power management to counteract the emerging thermal crisis for many-core systems on-chip. System identification techniques allow to extract models directly from the target device thermal response. Unfortunately, standard Least Squares techniques cannot effectively cope with both model approximation and measurement noise typical of real systems. In this work, we present a novel distributed identification strategy capable of coping with real-life
temperature sensor noise and effectively extracting a set of low-order predictive thermal models for the tiles of Intel’s Single-chip-Cloud-Computer (SCC) many-core prototype.
The publication can be found here
PHIDIAS poster wins two poster awards
The poster with the title “An Ambient Temperature Variation Tolerance Scheme for ULP Shared-memory processor Cluster” created by Daniele Bortolotti of the University of Bologna won two poster awards. At its first presentation at the 8th HiPEAC conference in Berlin (Germany) in January 2013 it was the winner of one of the NVIDIA poster awards.
The second award (Best Poster awards – 3rd place) the poster obtained while it was presented at the Nano-Tera/Artist International Summer School on Embedded System Design in Aix-les-Bains (France) in September 2013.
Prof. Vandergheynst gave a talk on high dimensional data processing on graphs and networks
11.12.12 – Prof. Vandergheynst gave a talk on high dimensional data processing on graphs and networks at the one-day workshop “Mathematics & Big Data” held at Polytech Lyon, December 10th 2012. The slides can be found at infoscience.epfl.ch/record/182751.
Best signal processing contribution award at the BASP Frontiers 2013 conference for Gilles Puy
01.02.13 – Gilles Puy received the Best Signal Processing Contribution Award at the BASP Frontiers 2013 conference for his paper “Non-convex optimization for robust multi-view imaging”. The abstract can be downloaded from infoscience.
