Cosimo Aprile was born in Leverano, Italy in 1988. He received the bachelor degree in Electronic Engineering in July 2010 from Politecnico di Torino. During the third academic year (2009/2010) he studied at Institut National des Sciences Appliquées de Lyon (INSA) in France. He received the international M.Sc. in Micro and Nanotechnologies for ICTs which is a double degree between the Politecnico di Torino (Polito) and Institut National Polytechnique de Grénoble (INPG) and a joint degree with the École polytechnique fédérale de Lausanne (EPFL). From March 2012 up to March 2013 he was employed by IBM Zurich Research Laboratory. In this period he worked for the Master Thesis project under the supervision of Professor Leblebici (EPFL) and Doct. Thomas Toifl (IBM). The task was the design of a low power receiver in 32nm SOI-CMOS able to efficiently remove far end crosstalk in single ended wireline communication systems. Cosimo was a PhD student at LIONS from April 2013 to August 2018. His PhD theses entitled Learning-Based Hardware Design for Data Acquisition Systems was supervised by Professor Volkan Cevher and co-advised by Professor Leblebici.
Publications with LIONS (most recent)
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A 16-Channel Neural Recording System-on-Chip With CHT Feature Extraction Processor in 65-nm CMOS
2019-01-01.15th IEEE Asian Solid-State Circuits Conference (A-SSCC), Macao, PEOPLES R CHINA, Nov 04-06, 2019. p. 239-240. DOI : 10.1109/A-SSCC47793.2019.9056940.
2019-01-01.15th IEEE Asian Solid-State Circuits Conference (A-SSCC), Macao, PEOPLES R CHINA, Nov 04-06, 2019. p. 219-222. DOI : 10.1109/A-SSCC47793.2019.9056985.
2019-01-01.IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, Feb 17-21, 2019. p. 476-478. DOI : 10.1109/ISSCC.2019.8662505.
2018.1st International Symposium on Integrated Circuits and Systems (ISICAS), Taormina, Italy, September 02-03, 2018. p. 3929-3941. DOI : 10.1109/TCSI.2018.2853983.
