Arda Uran (2021)

 

 

Research Interests:

  • Integrated Circuit Design
  • Dimensionality reduction
  • Implantable neurotechnology
  • High-speed data conversion and timing circuits

 

 

Biography

Arda received his BS degree in Electronics and Communication Engineering from Istanbul Technical University (ITU) in 2015, and his MS degree in Electrical Engineering from EPFL in 2017. His research focuses on exploring and leveraging trade-offs in integrated circuits to do more with fewer resources. He has completed his PhD degree at EPFL in 2021, co-advised by Prof. Volkan Cevher (LIONS) and Prof. Yusuf Leblebici (LSM). The thesis is entitled “Resource Trade-Offs in Circuits and Systems: from Neurotechnology to Communications ” .

Publications (most recent)

A 16-Channel Neural Recording System-on-Chip With CHT Feature Extraction Processor in 65-nm CMOS

A. Uran; K. Türe; C. Aprile; A. Trouillet; F. Fallegger et al. 

IEEE Journal of Solid-State Circuits. 2022.  p. 1-1. DOI : 10.1109/JSSC.2022.3161296.

A 16-Channel Wireless Neural Recording System-on-Chip with CHT Feature Extraction Processor in 65nm CMOS

A. Uran; K. Ture; C. Aprile; A. Trouillet; F. Fallegger et al. 

2021-05-17. 2021 IEEE Custom Integrated Circuits Conference (CICC), Virtual, April 25-30, 2021. DOI : 10.1109/CICC51472.2021.9431458.

Asynchronous sar adc with unit length capacitors and constant common mode monotonic switching

A. Uran; V. Cevher 

WO2021161163.

2021.

Resource Trade-Offs in Circuits and Systems: from Neurotechnology to Communications

A. Uran / V. Cevher; Y. Leblebici (Dir.)  

Lausanne, EPFL, 2021. 

An AC-Coupled Wideband Neural Recording Front-End With Sub-1 mm2×fJ/conv-step Efficiency and 0.97 NEF

A. Uran; Y. Leblebici; A. Emami; V. Cevher 

IEEE Solid-State Circuits Letters. 2020-08-04. Vol. 3, p. 258-261. DOI : 10.1109/LSSC.2020.3013993.