AZ 15 nXT is a cross-linking negative resist for resist film thicknesses up to approximatively 30 µm. The high stability and superior adhesion make the AZ 15 nXT well suited for most deep etching and electroplating applications. The resist sidewalls are very steep.
- Coating Tools : ACS 200; Sawatec SM-200
- Thickness range [µm]: 6 … 12
- Minimum CD / typical aspect ratio: ~ 4um
- Substrate topography: High
- Recommended for: Deep etching in harsh environment, electroplating
Process in CMi
! Cleanroom humidity warning !
Control of the relative humidity (RH) in photolithography zones is extremely critical. Stable and reproducible photolithography is expected within 38% to 48% RH range.
- In case of low RH (< 38%), the resist sensitivity and development rate decreases. It is then recommended to increase the recommended exposure doses.
- In case of high RH (> 48%), the resist adhesion decreases. It is then recommended to do an additional bake (>10 minutes @ 150°C) before loading the wafers in the HMDS or coating equipment.
Wafer surface preparation
Usually adhesion of photoresist on inorganic materials is poor resulting in losses of fine structures after development. To solve the issue, silicon wafers are generally treated using the HMDS vapor prime treatment before spincoating the photoresist. Details about the HMDS process and control can be found here: link
Assuming wafers with a clean surface free of organic contamination, the best adhesion will be obtained with the surface preparation recommended in the table:
| Surface material (larger area) | Vapor HMDS | Plasma O2 | Thermal dehydratation |
|---|---|---|---|
| Si | √√ | √ | √ |
| SiO2, fused silica, SiN, Si3N4 | √√ | √ | √ |
| Float glass, pyrex | √ | √√ | √ |
| Metals: Al, Au, Pt, Ti | … | √ | √√ |
| Metals: Ag, Cu, Cr, Fe | … | X | √√ |
| III/V semiconductors (GaN, GaAs) | … | X | √√ |
Legend: √√ Strongly recommended / √ Alternative process / … Not effective / X May affect or destroy underlaying material
Spincoating
The AZ 15nXT spincurve is shown below, as well as process details for both automatic and manual coating.
Available thicknesses: 6 um / 8 um / 10 um
| Spin speed [rpm] | Softbake time [mm:ss] | PR thickness [µm] |
|---|---|---|
| 4650, 30s | 03:40 | ~6 |
| 2700, 30s | 03:40 | ~8 |
| 1750, 30s | 03:40 | ~10 |
Softbake temperature is 120°C for all options.
Alternate coating sequences (for different bake temperatures, spin speed, or options) can be edited based on user’s requests. Please contact the photolithography staff for guidance.
Available options:
- HMDS / EC (edge clean)
- Dehydrate / EC
- HMDS / EBR (edge bead removal)
- Dehydrate / EBR
- Find the spin-coating speed “XXXX” [RPM] matching your target thickness from the AZ 15nXT spincurve.
- When coating on wafers, use the HV_”XXXX” recipe, which includes a 500 RPM spreading step and 100 seconds of main coating step.
- When coating on small chips, use the CHIP_”XXXX” recipe, which includes 40 seconds of main coating step and a short acceleration at the end to reduce edge bead effects.
- Softbake temperature: 120°C
- Softbake time: 3 minutes
Exposure
The following table lists the recommend dose threshold to crosslink AZ 15nXT coated on silicon wafers. It is recommended to perform a contrast curve / exposure matrix calibration for wafers other than silicon.
| Illumination: | Broadband* | i-line (355-365 nm) | i-line (375 nm) |
|---|---|---|---|
| Equipment: | MABA6, MA6 Gen3 (no filter) | VPG 200, MA6 Gen3 (filter), MJB4 | MLA 150 |
| PR thickness [µm] | Dose [mJ/cm2]+ | Dose [mJ/cm2]++ | Dose [mJ/cm2]+++ |
| 6 — 12 | – | >240 | Refer to Resist Tables |
* Mercury Lamp, Mask Aligner with UV400 configuration & no filter / + Based on intensity readings from Süss optometer broadband CCD / ++ Based on intensity readings from Süss optometer i-line CCD / +++ Based on MLA150 internal dose measurements
Development
The recommended developer for AZ 15 nXT is AZ 726 MIF (or MF CD 26), an organic solution based upon TMAH.
IMPORTANT: AZ 15nXT is a negative resist and requires a post-exposure bake (PEB) before development. On automated development equipment, the PEB is included in the development sequences. For manual development, make sure to perform the PEB as indicated in the section below!
The PEB step is part of the standard development recipes on the ACS 200 system. PEB is performed at 120°C for a minimum of 60 seconds with minimum proximity gap.
Development sequences for AZ 15nXT are listed below:
| Recipe name | PR thickness [µm] |
Total contact time [s] |
|---|---|---|
| D4_PEB_15nXT_6u_PUD |
6
|
80
|
| D4_PEB_15nXT_8u_PUD |
8
|
105
|
| D4_PEB_15nXT_10u_PUD |
10
|
125
|
Puddle method is used for the development with intermediate spin-clean steps. No Softbake is applied in order to preserve vertical PR side walls.
- ! Important! Make sure to perform the PEB at 120°C for 60 seconds before development.
- Recommended developer: AZ 726 MIF
- Development time: 10″/1um
- Rinse: H2O 1min
IMPORTANT:
After development, it is mandatory for wafers to go through an additional rinsing step with DI water to avoid backside contamination and damage on equipments (chuck in etcher) in further processing steps. The water baths of the following wet benches can be used free of charge (5 min. billing delay after login):
- Z01 – Plade “Solvent” wet bench
- Z02 – UFT “Resist” wet bench